1. Field of the Invention
The present invention relates to a method of forming and testing a phase shift mask (PSM), and more specifically, to a method of performing a PSM test by using the formed PSM.
2. Description of the Prior Art
In semiconductor processes, it is necessary to form designed patterns on a photomask in order to numerously and repetitively define an integrated circuit. Because the pattern transferred to the semiconductor wafer has a narrow line width, improvements to the resolution of the photomask are required. Such improvements insure that the pattern on the photomask is correctly transferred to the semiconductor wafer, which subsequently ensures that later etching and ion implantation processes proceed successfully.
The primarily method in the prior art for improving resolution is to use a phase shift mask (PSM) to improve the resolution of the pattern transferred to the semiconductor wafer. The prior art phase shift mask comprises a flat glass substrate, a phase shifter layer, and a chromium (Cr) layer with a pattern on it. The pattern on the Cr layer is formed by the exposure and the development processes. When transferring the pattern of the PSM onto the semiconductor wafer, the phase shifter layer can generate 180° phase shift angle for the light penetrating through, which can reduce the pattern boundary vibration so that the pattern can be accurately transferred onto the semiconductor wafer.
Please refer to FIG. 1 to FIG. 4 of cross-sectional views of forming a phase shift mask 20 according to the prior art. As shown in FIG. 1, a phase shift layer 12, a chrome blinding layer 14 and a photoresist layer (not shown) are formed in sequence from bottom to top on a quartz mask substrate. The photoresist layer is patterned with an e-beam and forms a patterned first photoresist layer 16. As shown in FIG. 2, one first etching process is performed, using the first photoresist layer 16 as mask, in order to remove those portions of the blinding layer 14 that are not covered by the first photoresist layer 16. The first photoresist layer is then completely removed.
As shown in FIG. 3, a photoresist layer (not shown) is formed on top of the phase shift layer 12 and blinding layer 14. Again, the photoresist layer is patterned with an e-beam to form a patterned second photoresist layer 18. The patterned area that is defined by the second photoresist layer 18 is larger than the area of the blinding area 14, and covers the blinding area 14 completely. The phase shift region is thus formed around the blinding pattern. As shown in FIG. 4, a second etching process is performed on the phase shift layer in order to remove the phase shift layer 12 that is not covered by the second photoresist layer 18. The second photoresist layer 18 is then completely removed, which finishes the prior art process of forming the phase shift mask 20.
As the process line width decreases, the alignment accuracy (AA) and the focal condition of the lithography process play a more and more important roll in semiconductor production. In order to make the PSM precisely aligned with the semiconductor wafer, a plurality of alignment mark, also called verniers, are formed within a periphery region of the PSM surface. In most cases, the alignment marks are formed within a scribe line region of the PSM surface and transferred to the photoresist layer of the semiconductor wafer. A phase shift mask test (PSM test), comprising a registration test, a phase angle test and a transparency test, is performed by using the alignment marks transferred to the semiconductor wafer, so as to ensure the yield rates of subsequent process.
However, the alignment marks according to the prior art are formed within the scribe line region instead of the main field region of the phase shift mask 20, so that the etching uniformity of portions of the phase shift mask 20 cannot be precisely monitored. In addition, the registration test, phase angle test and the transparency test are respectively performed in different processes, leading to increased production lead-time and raised manufacturing cost. Consequently, the product becomes less competitive in the market.